AArch64 EL2 hypervisor for QEMU virt that boots at EL2
1#include "hv/allocator.h"
2#include "hv/arch.h"
3#include "hv/config.h"
4#include "hv/el2_mmu.h"
5#include "hv/log.h"
6#include "hv/panic.h"
7#include "hv/policy.h"
8#include "hv/selftest.h"
9#include "hv/stage2.h"
10#include "hv/sysreg.h"
11
12static void require(bool ok, const char *name)
13{
14 if (!ok) {
15 panic(name);
16 }
17 log_simple(LOG_SELFTEST, 0u, (uint64_t)(uintptr_t)name, 0u);
18}
19
20void selftests_run_or_panic(void)
21{
22 require(hv_is_aligned_u64((uint64_t)(uintptr_t)__vectors_el2, 2048u), "selftest vectors alignment");
23 require(stage2_selftest(), "selftest stage2 descriptors");
24 require(el2_mmu_selftest(), "selftest el2 mmu plan");
25 require(CONFIG_GUEST_RAM_SIZE != 0u && hv_is_aligned_u64(CONFIG_GUEST_RAM_BASE, CONFIG_PAGE_SIZE),
26 "selftest guest memory bounds");
27 require(policy_selftest(), "selftest policy table");
28 require(sysreg_selftest(), "selftest sysreg decoder");
29 require(log_selftest(), "selftest log wraparound");
30 require(allocator_selftest(), "selftest allocator");
31
32 uint64_t hcr;
33 uint64_t sctlr;
34 uint64_t vttbr;
35 __asm__ volatile("mrs %0, hcr_el2" : "=r"(hcr));
36 __asm__ volatile("mrs %0, sctlr_el2" : "=r"(sctlr));
37 __asm__ volatile("mrs %0, vttbr_el2" : "=r"(vttbr));
38 require((hcr & HV_BIT(0)) != 0u && (hcr & HV_BIT(31)) != 0u, "selftest hcr trap sanity");
39 require((sctlr & (HV_BIT(0) | HV_BIT(2) | HV_BIT(12))) ==
40 (HV_BIT(0) | HV_BIT(2) | HV_BIT(12)), "selftest sctlr el2 mmu enabled");
41 require((vttbr & 0x0000fffffffff000ull) == stage2_vttbr(), "selftest vttbr root");
42}