vm.fail
AArch64 EL2 hypervisor for QEMU virt that boots at EL2
1#ifndef HV_SYSREG_H
2#define HV_SYSREG_H
3
4#include "hv/types.h"
5
6#define ESR_EC_SHIFT 26u
7#define ESR_EC_MASK 0x3fu
8#define ESR_EC_UNKNOWN 0x00u
9#define ESR_EC_WFI_WFE 0x01u
10#define ESR_EC_SMC64 0x17u
11#define ESR_EC_HVC64 0x16u
12#define ESR_EC_SYSREG 0x18u
13#define ESR_EC_IABT_LOWER 0x20u
14#define ESR_EC_DABT_LOWER 0x24u
15#define ESR_EC_BRK64 0x3cu
16
17#define ESR_SYSREG_DIR_READ 1u
18#define ESR_SYSREG_DIR_WRITE 0u
19
20struct sysreg_access {
21 uint32_t op0;
22 uint32_t op1;
23 uint32_t crn;
24 uint32_t crm;
25 uint32_t op2;
26 uint32_t rt;
27 bool is_read;
28 uint64_t key;
29};
30
31#define SYSREG_KEY_CONST(op0, op1, crn, crm, op2) \
32 ((((uint64_t)((op0) & 0x3u)) << 14u) | \
33 (((uint64_t)((op1) & 0x7u)) << 11u) | \
34 (((uint64_t)((crn) & 0xfu)) << 7u) | \
35 (((uint64_t)((crm) & 0xfu)) << 3u) | \
36 ((uint64_t)((op2) & 0x7u)))
37
38static inline uint32_t esr_ec(uint64_t esr)
39{
40 return (uint32_t)((esr >> ESR_EC_SHIFT) & ESR_EC_MASK);
41}
42
43uint64_t sysreg_key_make(uint32_t op0, uint32_t op1, uint32_t crn, uint32_t crm, uint32_t op2);
44bool sysreg_decode_from_esr_iss(uint64_t iss, struct sysreg_access *out);
45const char *sysreg_key_name(uint64_t key);
46bool sysreg_selftest(void);
47
48#endif