vm.fail / ariel
AArch64 EL2 hypervisor for QEMU virt that boots at EL2
1
Fork 0

Configure Feed

Select the types of activity you want to include in your feed.

Use EL2 memory ordering obligations for trap handlers

author vm.fail date (May 22, 2026, 9:07 AM UTC) commit 7bda35e6 parent ee9057a9
+7
+5
arch/aarch64/arch.c
··· 55 55 __asm__ volatile("msr daif, %0\nisb" :: "r"(flags) : "memory"); 56 56 } 57 57 58 + void arch_context_barrier(void) 59 + { 60 + __asm__ volatile("dsb ish\nisb" ::: "memory"); 61 + } 62 + 58 63 void arch_dump_el2_state(void) 59 64 { 60 65 uint64_t current_el;
+1
core/trap.c
··· 289 289 290 290 timer_vcpu_sync(vcpu); 291 291 gicv3_flush_vcpu_state(vcpu); 292 + arch_context_barrier(); 292 293 vcpu_store_frame(vcpu, frame); 293 294 } 294 295
+1
include/hv/arch.h
··· 22 22 bool arch_vectors_aligned(void); 23 23 uint64_t arch_irq_save(void); 24 24 void arch_irq_restore(uint64_t flags); 25 + void arch_context_barrier(void); 25 26 void arch_dump_el2_state(void); 26 27 void arch_el2_configure(uint64_t vttbr, uint64_t vtcr); 27 28 void arch_enable_el2_mmu(uint64_t ttbr0, uint64_t tcr, uint64_t mair);